A. Stylianou, K. Polemidiotou, V. Alimisis, F. Mpekris, C. Voutouri, M. Mari, G. Filippidis, A. Zachariades, S.-V. Kontomaris, P. P. Sotiriadis, V. Gkretsi and T. Stylianopoulos, "Atomic Force Microscopy-Based Nanomechanical Signatures For Staging Classification and Drug Response In Pulmonary Fibrosis", Small, Wiley, 2025.
V. Alimisis, V. Moustakas, K. Cheliotis, A. Mylona and P.P. Sotiriadis, "An Analog ReLu-based Decision Tree Circuit Architecture for Biomedical Application", Analog Integrated Circuits and Signal Processing, Springer, 2025.
V. Alimisis, K. Cheliotis, V. Moustakas, A. Mylona, C. Dimas, and P.P. Sotiriadis, "A Design Methodology for Analog Integrated Artificial Neural Networks Circuits: Architectures, Design and Training", Analog Integrated Circuits and Signal Processing, Springer, 2025.
Vassilis Alimisis, Vasileios Moustakas, Konstantinos Cheliotis, Christos Dimas, Paul P. Sotiriadis, "A Power and Area Efficient Analog Classifier for Electrical Impedance Tomography Applications", Circuits, Systems & Signal Processing (CSSP), 2025.
Z. Foufas, V. Alimisis, P. P. Sotiriadis, "Design of a Low-Power Analog Integrated Deep Convolutional Neural Network", IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 2025.
B. Mishra, A. Basu, F. Shehadeh, L. Felix, S. S. Kollala, Y. S. Chhonker, M. T. Naik, C. Dellis, L. Zhang, N. Ganesan, D. J. Murry, J. Gu, M. B. Sherman, F. M. Ausubel, P. P. Sotiriadis, and E. Mylonakis, "Antimicrobial Peptide Developed with Machine Learning Sequence Optimization Targets Drug Resistant Staphylococcus aureus in Mice", The Journal of Clinical Investigation, 2025. doi: 10.1172/JCI185430
E. Georgiou, T. Kantianis, D. Papa, V. Moustakas, V. Alimisis, P. P. Sotiriadis, "An Early Detection Auditory Disorders System based on Power-Efficient Analog Hardware Sigmoid-based Classifiers", IEEE ICABME 2025.
A. Mylona, V. Alimisis. P.P. Sotiriadis, "A Power-Efficient Analog Hardware Neural Network for Hand Gesture Recognition", IEEE ICABME 2025.
V. Alimisis, K. Cheliotis, A. Mylona, V. Moustakas and P. P. Sotiriadis, "A Power-Efficient Analog Integrated K-means Classifier Architecture for Brain Stroke Prediction", 32nd IEEE International Conference on Electronics, Circuits and Systems, ICECS, 2025.
V. Alimisis, K. Cheliotis, A. Mylona, V. Moustakas and P. P. Sotiriadis, "A Low-Power Analog Integrated Decision Tree Classifier Architecture for Apnea-ECG Detection", 32nd IEEE International Conference on Electronics, Circuits and Systems, ICECS, 2025.
V. Alimisis, M. M. Al Sidani, R. Younes, K. Cheliotis, P. P. Sotiriadis, J. Possik, C. Yaacoub and R. A. Z. Daou, "Detection of Multiple Sclerosis Based on MRI Images Using Low-Power Analog Integrated ANNs", The Conference on Advances in Computational Tools for Engineering Applications, ACTEA, 2025.
V. Alimisis, A. Mylona, K. Cheliotis, V. Moustakas, C. Dimas and P. P. Sotiriadis, "Low-Power ECG Anomaly Detector Using an Area-Efficient Artificial Neural Network", 2025 IEEE 38th International System-on-Chip Conference, SOCC, 2025.
V. Alimisis, K. Cheliotis, A. Mylona, V. Moustakas and P. P. Sotiriadis, "Designing Analog Hardware Neural Network Architectures Using Neural Network Optimization: An AI-for-AI Approach", International Conference on Frontiers of Artificial Intelligence, Ethics, and Multidisciplinary Applications, FAIEMA, 2025.
V. Moustakas, K.Cheliotis, A. Mylona, V. Alimisis and P. P. Sotiriadis, "An Analog Low-Power Decision Tree Classifier Architecture for Parkinson’s disease prediction", International Conference on Frontiers of Artificial Intelligence, Ethics, and Multidisciplinary Applications, FAIEMA, 2025.
A. Mylona, V. Alimisis, K. Cheliotis, V. Moustakas and P. P. Sotiriadis, "A Power-Efficient Analog Integrated Decision Tree Classifier for Dementia Prediction", 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME, 2025.
V. Moustakas, V. Alimisis, K. Cheliotis, A. Mylona and P. P. Sotiriadis, "A Low-Power Analog Integrated Gaussian Function Circuit Using Source Degeneration and Adaptive Bulk Biasing for Forest Fire Prediction", 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME, 2025.
K.Cheliotis, V.Alimisis, V.Moustakas, A.Mylona and P. P. Sotiriadis, "A Low-Power Analog Hardware Nearest Centroid Classifier for Glioma Brain Tumor Classification", 20th International Conference on PhD Research in Microelectronics and Electronics, PRIME, 2025.
V. Alimisis, K. Cheliotis, V. Moustakas, A. Mylona, Z. Foufas and P. P. Sotiriadis "A Power-Efficient Analog Integrated Decision Tree Classifier for Machine Predictive Maintenance Classification", IEEE Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design (SMACD), 2025.
K. Cheliotis, V. Alimisis, V. Moustakas, Z. Foufas, A. Mylona and P. P. Sotiriadis, "An Energy-Efficient Analog Integrated Neural Network for Cirrhosis Patient Survival Prediction", IEEE Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design (SMACD), 2025.
K. Cheliotis, V. Alimisis, V. Moustakas, A. Papathanasiou and P. P. Sotiriadis, "A Low-Power Analog Integrated Decision Tree Classifier for Laryngeal Voice Disorder Detection", 23rd IEEE International Newcas Conference, IEEE, 2025.
V. Moustakas, V. Alimisis, K. Cheliotis, A. Papathanasiou and P. P. Sotiriadis, "A Low-Power Analog Integrated Gaussian Function Circuit Using Source Degeneration and Bulk Biasing for ML Applications" , 23rd IEEE International Newcas Conference, IEEE, 2025.
V. Moustakas, V. Alimisis, Z. Foufas, K. Cheliotis, A. Mylona and P. P. Sotiriadis, "A Low-Power Analog Integrated Decision Tree for Diabetic Retinopathy Detection", 14th International Conference on Modern Circuits and Systems Technologies (MOCAST), IEEE, 2025.
V. Alimisis, A. Mylona, K. Cheliotis, V. Moustakas, Z. Foufas and P. P. Sotiriadis, "A Cuff-Less Blood Pressure Estimation System Based On Low-Power Analog Integrated Neural Network", 14th International Conference on Modern Circuits and Systems Technologies (MOCAST), IEEE, 2025.
V. Alimisis, C. Dimas, A. Papathanasiou and P. P. Sotiriadis, "A Low-Power Analog Hardware Sigmoid-Based Neural Network for Biomedical Applications", 2025 IEEE International Symposium on Circuits and Systems, London, UK.
V. Alimisis, V. Moustakas, A. Papathanasiou, K. Cheliotis and P. P. Sotiriadis, "An Analog Hardware Neural Network-Based Classifier for Robot Manipulation", 2025 International Conference on Control, Automation, and Instrumentation (IC2AI), Beirut, Lebanon, 2025, pp. 1-7, doi: 10.1109/IC2AI62984.2025.10932215.
Vassilis Alimisis, Christos Dimas, Andreas Papathanasiou, Paul P. Sotiriadis, "A Low Power Analog Integrated Artificial Neural Networks for Electrical Impedance Tomography Stroke Classification", IEEE 36th International Conference on Microelectronics (ICM), Doha, Qatar, 2024.
Vassilis Alimisis, Christos Dimas, Paul P. Sotiriadis, "A Power Efficient Integrated, Sigmoid-Based Edge Detector", IEEE 36th International Conference on Microelectronics (ICM), Doha, Qatar, 2024.
Vassilis Alimisis, Christos Dimas, Andreas Papathanasiou, Paul P. Sotiriadis, "An Analog Integrated Relu-based Neural Networks for Water Quality Classification", IEEE 36th International Conference on Microelectronics (ICM), Doha, Qatar, 2024.
V. Alimisis, A. Kamperi, N. Eleftheriou, P. P. Sotiriadis, "A Low Power Analog Bell Shaped Classifier Based on Parallel Connected Gaussian Function Circuits", 1st International Conference on Frontiers of Artificial Intelligence, Ethics, and Multidisciplinary Applications, Athens, Greece, 2023. [ Best Paper Award]
2016 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, to be held in San Francisco, California, USA, during May 22-24, 2016 : Digital Signal Generation With Focus on Direct Digital Synthesis DDS workshop. Paul Sotiriadis “All Digital Frequency Synthesis Based on New Sigma Delta Architectures”.
Joint IEEE International Frequency Control Symposium and European Frequency and Time Forum, Denver, CO, USA, "All Digital Frequency Synthesis Based on New Sigma-Delta Modulation Architectures", April 2015.
Synergy Microwave Corporation, Paterson New Jersey, USA, "On All-Digital Frequency Synthesis" June 2014.
Qualcomm, Santa Clara, CA, “Emerging Frequency Synthesis Techniques for the Current and Future Advanced CMOS Technologies, with L. Xiu and R.B. Staszewski, Aug. 2010, organized by the IEEE Santa Clara Valley CAS chapter.
IBM, Austin, TX, “Emerging Frequency Synthesis Techniques for the Current and Future Advanced CMOS Technologies, with L. Xiu and R.B. Staszewski, Aug. 2010, organized by the IEEE Central Texas SSC & CAS chapter.
Texas Instruments, Dallas TX, “”On Flying-Adder Synthesizers”, Nov. 2008, Invited by L. Xiu.
Automation and Robotics Research Institute, Arlington TX, “I.C. design for fast control systems”, Nov. 2008, Invited by the director, H. Stephanou.
Tyndall National Institute, Cork Ireland, “On The Spectrum of Flying-Adders”, Oct, 2008 Invited by the director of the institute, Dr. R. Whatmore.
ECE Dept. Technical University of Crete, Greece, “Diophantine Frequency Synthesis, A Number Theory Approach to Fine RF Frequency Synthesis & Integrated Frequency Standards”, Nov. 2007.
Analog Devices Inc, Wilmington MA, “Diophantine Frequency Synthesis, A Number Theory Approach to Fine RF Frequency Synthesis & Integrated Frequency Standards”, Sep. 7, 2007.
Dept. of Informatics & Telecommunications, Univ. of Athens, Greece, “Diophantine Frequency Synthesis, A Number Theory Approach to Fine RF Frequency Synthesis & Integrated Frequency Standards”, July 11th, 2007. Invited by Prof. S. Theodoridis.
ECE Dept. University of Patras, Greece, “Diophantine Frequency Synthesis, A Number Theory Approach to Fine RF Frequency Synthesis & Integrated Frequency Standards”, July 9th, 2007. Invited by Profs. G. Papadopoulos & T. Stouraitis.
ECE Dept. University College London, U.K., “Diophantine Frequency Synthesis, A Number Theory Approach to Fine RF Frequency Synthesis & Integrated Frequency Standards”, June 28th, 2007. Invited by the department Chair.
Tyndall National Institute, Cork Ireland, “Diophantine Frequency Synthesis, A Number Theory Approach to Fine RF Frequency Synthesis & Integrated Frequency Standards”, June 26th, 2007. Invited by Prof. P Kennedy.
Tyndall National Institute, Cork Ireland, “A New RF Radiometer for Absolute Noninvasive Temperature Sensing in Biomedical Applications”, Jun 26th, 2007 Invited by Prof. P. Kennedy.
Raytheon, MA, USA, “The JHU High-Speed, Adaptive Phase-Controller Microsystem”, Sotiriadis June 4th, 2007.
Texas A & M University - Leaders & Innovators Speaker Series, “Radio-Frequency Radiometry for Absolute Temperature Monitoring in Magnetic Resonance Imaging”, 2007.
Synergy Microwaves Corporation, N.J., USA. Invited by Prof. U. Rohde, partner of Rohde Schwarz, Germany, chairman of Synergy Microwave NJ, USA.
National Institute of Standards and Technology, U.S.A. “High-Speed, Multi-Dithering Adaptive Microsystems”, D. Loizos (Dr. Sotiriadis’ PhD stud.) and P. Sotiriadis. Invited by Dr. N. Dagalakis.
Carnegie Mellon University, “Diophantine Frequency Synthesis: A Number Theory Approach to Fine RF Frequency Synthesis”, Feb 20th, 2007. Invited by Prof. R. Marculescu.
Naval Research Laboratories, “Ultra Fine RF Frequency Synthesis for Radar Applications”, Dec. 14th, 2006. Invited by P. Vouras.
ETH Zurich, Switzerland, “Communication Energy Limits in VLSI circuits; An Information Theoretic Perspective”, Sept 13th 2006. Invited by Prof. Amos Lapidoth.
University of Maryland, “Diophantine Frequency Synthesis: A Number Theory Approach to Fine Frequency Synthesis”, Sept. 5th, 2006. Invited by Prof. R. Newcomb.
Applied Mathematics and Statistics, Johns Hopkins University, April 20th 2006, Invited by Chairman Prof. Dan Naiman.
United States Naval Observatory , “Diophantine Frequency Synthesis A new approach to ultra-fine frequency synthesis”, Oct. 12, 2005. Invited by the director of the Timing systems lab, Dr. Matsaki.
Applied Physics Laboratory, Johns Hopkins University, P. Sotiriadis & G. Weaver, “Disciplined Ultra-stable Oscillator Technology Development - Fine Frequency Synthesis Using Diophantine Calculus”, July 20, 2005.
ECE Dept., Johns Hopkins University, “Challenges in the design of High Performance Microprocessors”, Nov. 8, 2002.
MIT-HP Wireless Networking Kickoff, University Park at MIT, Jan. 10, 2002.
MARCO Interconnect Focus Center, Georgia Center for Advanced Telecommunications Technology, Georgia Inst. of Technology, Jan 7-8, 2002.
Center for Integrated Circuits and Systems, Microsystems Technology Lab, Massachusetts Institute of Technology, Apr. 30th, 2001.
MARCO Interconnect Focus Center Workshop, Massachusetts Inst of Tech., Mar. 30, 2001.
Multilink Technology Corporation, Dec. 1st 2000. Invited by Dr. John Khoury
Dept. of Electrical Engineering, Columbia University, Nov. 17th 2000. Invited by Prof. Y. Tsividis
Interconnect Focus Center, Manufacturing Research Center, Georgia Inst. of Tec., Aug. 15th 2000.
Books - Book Chapter
N. Hadjigeorgiou, M. Sophocleous, E. Hristoforou and P. P. Sotiriadis, Magnetic Sensors for Space Applications: Development and Magnetic Cleanliness Considerations, (36 pages), Chapter 7 in “Electromagnetic Compatibility for Space Systems Design”, Editor: C. D. Nikolopoulos, IGI Global 2018. DOI: 10.4018/978-1- 5225-54145- 8.ch007.
P. Sotiriadis, Power Reduction Coding for Buses, Energy Measures and Performance Limits, (28 pages), Chapter 7 in “Interconnect-Centric Design for Advanced SOC and NOC”, Editors: J. Nurmi, H. Tenhunen, J. Isoaho, A. Jantsch, Kluwer Academic Publishers 2004.
Patents
“Method and Apparatus for Reducing Delay in a Bus Provided From Parallel, Capacitively Coupled Transmission Lines”, P. Sotiriadis, A. Chandrakasan, US Patent 7400276.