In a grand ceremony held on June 10, 2024, the National Technical University of Athens(NTUA) School of Electrical and Computer Engineering proudly conferred the title of Doctor Honoris Causa upon Anantha P. Chandrakasan, MIT’s Chief Innovation and Strategy Officer, Dean of Engineering, and Vannevar Bush Professor of Electrical Engineering and Computer Science. The prestigious event took place in the esteemed Kaftanzoglou Hall of NTUA’s Averof Building.

Anantha P. Chandrakasan was recognized for his pioneering research in low-power electronics, visionary leadership in engineering and technology, and unwavering commitment to advancing knowledge and educating future generations of engineers.

The ceremony was attended by distinguished guests, including university officials, faculty members, and members from the broader scientific community. Additionally, in honor of Prof. Chandrakasan, the Greek MIT professors Antoniadis, Patrikalakis, Sapsis, Triantafyllou, Tsitsiklis, Christia, and Prof. Daskalakis, who is a graduate of our School, were also present, further highlighting the great significance of this occasion.

NTUA Rector, Professor Ioannis Chatjigeorgiou, opened the ceremony by highlighting Chandrakasan’s impact on technology. Vice Dean Pavlos Georgilakis, standing in for Dean Panayiotis Tsanakas, praised Chandrakasan's contributions and extended congratulations on behalf of our School, noting the honor of awarding him the Doctor Honoris Causa. Professor Manos Varvarigos served as the master of ceremonies.

Our own Professor Paul-Peter Sotiriadis of NTUA, a former PhD student of Chandrakasan at MIT, provided an insightful overview of Chandrakasan's groundbreaking work. He highlighted the transformative impact of Chandrakasan's research on energy-efficient integrated circuits and systems, which has driven advancements in low-power computing devices. Sotiriadis also shared personal reflections on Chandrakasan's unwavering dedication to mentoring and inspiring the next generation of engineers.

Anantha P. Chandrakasan, who joined MIT’s faculty in 1994, has made significant contributions to the development of energy efficient integrated circuits, impacting technologies such as wireless sensors and personal multimedia terminals. Throughout his career, he has mentored 75 PhD students and received numerous prestigious awards, including the IEEE Donald O. Pederson Award in Solid-State Circuits and the IEEE Mildred Dresselhaus Medal. He is a Fellow of both the IEEE and the Association for Computing Machinery, and an elected member of the National Academy of Engineering and the American Academy of Arts and Sciences.

Since his appointment as MIT’s Dean of Engineering in 2017, Chandrakasan has spearheaded over 20 cross-disciplinary initiatives, focusing on critical global issues such as climate change, sustainability, artificial intelligence, and life sciences. His efforts have significantly advanced MIT’s strategic goals and fostered a culture of interdisciplinary collaboration and innovation.

In his acceptance speech, Chandrakasan discussed the latest advancements in energy-efficient and secure circuits and systems. He also highlighted the strong collaborative ties between MIT and NTUA, emphasizing their shared dedication to addressing global challenges through research and innovation. He noted the fruitful exchange of scholars between the institutions, with 15 NTUA graduates becoming MIT faculty and 14 MIT graduates joining NTUA's faculty, with our School of Electrical and Computer Engineering playing a key role in this exchange.

Expressing his gratitude, Chandrakasan remarked, "It is an immense honor to join the esteemed community of NTUA by receiving the Honorary Doctorate from the School of Electrical and Computer Engineering. Our shared commitment to excellence and innovation drives us to make meaningful contributions to the world."

This momentous event brought MIT, the world’s top engineering school, closer to our School of Electrical and Computer Engineering (ECE), thanks to our own Professor Paul Sotiriadis, who initiated the honorary doctorate for Chandrakasan and orchestrated his visit to Greece, along with all the meetings the MIT Dean had to foster collaboration.

Following the ceremony, a reception was held, providing participants the opportunity to converse with Professor Chandrakasan. Subsequently, he met with numerous NTUA students, primarily from our School. He answered questions about MIT, engaged in discussions, exchanged ideas, and offered suggestions on how to enrich their studies and plan their future career steps. The students participated with great enthusiasm.

After the event, Professor Chandrakasan, accompanied by Professor Sotiriadis, met with Prime Minister Kyriakos Mitsotakis and Minister of Education Kyriakos Pierrakakis at Maximos Mansion to discuss potential collaborations between MIT and Greece. During his stay, Chandrakasan also engaged in discussions with leaders from the business, industrial, and shipping sectors, organized by Professor Sotiriadis. These meetings further explored opportunities for partnership and innovation, aiming to establish collaborations between MIT, NTUA, and Greece in general.

Professor of ECE-NTUA Paul Peter Sotiriadis among the top 2% of highly cited scientists in the world

Stanford University and Elsevier have published the ranking of the 2% of the most influential researchers in the world in all scientific disciplines for 2022, retrieving data from the SCOPUS database and using a range of parameters for the harmonization of each scientist's research contribution and influence. As a result, a list of the top scientists from all scientific subjects (as well as those ranked in the top 2% in their main subfield discipline) was compiled.

Twenty-nine (29) Professors from the ECE of the NTUA are included in the lists.

The first list refers to all years analyzed (1788-2022) and includes the following 27 Professors of ECE-NTUA:

Afrati Foto*, Antonopoulos Antonios, Avramopoulos Hercules, Doukas Haris, Fikioris George, Fotakis Dimitris, Georgilakis Pavlos, Hatziargyriou Nikos, Hristoforou E., Kladas Antonios, Kollias Stefanos*, Korres Georgios, Manias Stefanos*, Maragos Petros, Nikita Konstantina, Panagopoulos Athanasios, Papathanassiou Stavros, Papavasiliou Anthony, Papavassiliou Symeon, Psarras John, Sotiriadis Paul, Topalis F., Tsalamengas John*, Tzafestas Spyros (†), Uzunoglu Nikolaos*, Varvarigou Theodora, Vournas Costas*

A second list referring to the year 2022, only, includes the following 16 Professors and 1 EDIP of ECE-NTUA:

Antonopoulos Antonios, Doukas Haris, Fotakis Dimitris, Georgilakis Pavlos, Hatziargyriou Nikos*, Korres Georgios, Kyriakopoulos Grigorios (EDIP), Manias Stefanos*, Maragos Petros, Marinakis Vangelis, Nikita Konstantina, Papathanassiou Stavros, Papavasiliou Anthony, Papavassiliou Symeon, Tzafestas Spyros (†), Voulodimos Athanasios, Vournas Costas*

(Retired/emeritus professors are marked with * and deceased with †)

Related link:

https://elsevier.digitalcommonsdata.com/datasets/btchxktzyw/6

Paper by ECE-NTUA Ph.D. Candidate V. Alimisis, Diploma Students N. P. Eleftheriou and Savvas Leventikidis and Prof. P. P. Sotiriadis received the Best Paper Award (3rd Place) in the IEEE 35th International Conference on Microelectronics 2023

We are pleased to announce that the paper entitled "An Analog Integrated, Low-Power, Area-Efficient, Gilbert, Modulo-based Classifier with Application to Lung-Cancer Classification" received the Best Paper Award (3rd Place) in the IEEE 35th International Conference on Microelectronics 2023 that was held on 17-20 December 2023 in Abu Dhabi, UAE.

The Award-Winning paper was co-authored by Vassilis Alimisis (Ph.D. Candidate, ECE NTUA), Nikolaos P. Eleftheriou (Diploma Student, ECE NTUA), Savvas Leventikidis (Diploma Student, ECE NTUA) and Paul P. Sotiriadis (Professor, ECE NTUA, Fellow IEEE).

Short Abstract: This study presents an alternative approach to develop low-power (744nW) analog classifiers capable of efficiently handling multiple input features while maintaining high levels of accuracy and minimizing power consumption. The proposed classifier relies on Voting and Bayes mathematical models, incorporating Gilbert two-signal four-quadrant multipliers and current comparators. The analog classifier is validated through testing with a real-world lung-cancer surgery dataset, achieving an accuracy of 75.45%. It predicts all testset samples of patients suffering from lung-cancer. Additionally, a comparison with related analog classifiers using the same dataset is conducted. The models are trained via a software-based implementation. The proposed architecture is realized using the TSMC 90nm CMOS process and simulated using the Cadence IC Suite.

Paper by ECE-NTUA Ph.D. Candidate V. Alimisis, Diploma Students A. Kamperi and N. P. Eleftheriou and Prof. P. P. Sotiriadis received the Best Runner-Up PhD Symposium Paper Award in the Springer FAIEMA 2023 Conference

We are pleased to announce that the paper entitled "A Low-Power Analog Bell-shaped Classifier based on Parallel-connected Gaussian function circuits" received the Best Runner-Up PhD Symposium Paper Award in the Springer 1st International Conference on Frontiers of Artificial Intelligence, Ethics, and Multidisciplinary Applications; 25th - 26th September 2023, Athens, Greece.

The Award-Winning paper was co-authored by Vassilis Alimisis (Ph.D candidate, ECE-NTUA), Argyro Kamperi (Diploma Student, ECE-NTUA), Nikolaos P. Eleftheriou (Diploma Student, ECE-NTUA), and Paul P. Sotiriadis (Professor, ECE-NTUA, Fellow IEEE).

ABSTRACT: In this study, a novel approach is presented for developing ultra-low power analog classifiers capable of effectively handling multiple input features while maintaining high levels of accuracy and minimizing power consumption. The proposed methodology is built upon a Voting model that leverages Gaussian likelihood functions. To evaluate the performance of the proposed methodology, a comparison is conducted against the widely used analog Bell-shaped classifiers. Real-life breast cancer dataset is employed for this comparison. The models are trained and the results are processed using the Python programming language. The hardware design and result processing utilize Cadence IC Suite, implementing the TSMC 90 nm CMOS process technology.