Circuits and Systems Group

EDA Tools

Automated Design, Optimization and Technology Node Migration

Investigation of methodologies for automatic sizing of analog Integrated Circuits. Development of in-house tools for optimizing, migrating and modeling analog circuits using off-the-shelf commercial simulators for evaluation. Custom optimization algorithm development targeting the aforementioned applications.

Relevant Publications

K. Touloupas, P.P. Sotiriadis, "Mixed-Variable Bayesian Optimization for Analog Circuit Sizing through Device Representation Learning", Electronics, 2022, DOI: 10.3390/electronics11193127.

K. Touloupas, P.P. Sotiriadis, "LoCoMOBO: A Local Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing", IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 2021.

Konstantinos Touloupas, Nikos Chouridis, Paul P. Sotiriadis "Local Bayesian Optimization For Analog Circuit Sizing", 58th Annual Design Automation Conference. 2021.

Kostas Touloupas, Paul P. Sotiriadis, "Analog and RF Circuit Constrained Optimization Using Multi-Objective Evolutionary Algorithms", 12th IEEE Latin America Symposium on Circuits and System (LASCAS). 2021.

M-E. Plagaki, K. Touloupas, P.P. Sotiriadis, "Multi-Objective Optimization Methods for CMOS LC-VCO Design", IEEE International Conference on Modern Circuits and Systems Technologies, Thessaloniki, Greece, 2021.

Nonlinearity Modeling and Distortion Estimation

Methods for fast and accurate harmonic and intermodulation distortion estimation in CMOS circuits.

Relevant Publications

D. Baxevanakis, V. Alimisis, P.P. Sotiriadis, "An Intermodulation Distortion Estimation Method for Linear CMOS Circuits", International Journal of Circuit Theory and Applications, 49: 1244-1260, 2021.

D. Baxevanakis, P.G. Zarkos, C.G. Adamopoulos, I. Vassiliou, P.P. Sotiriadis, "Design optimization guidelines for a class of RF switched-capacitor power amplifiers", AEÜ - Int. Journal of Electronics and Communications, Volume 138, August 2021, 153876.

D. Baxevanakis, P.P. Sotiriadis, "A General Time-Domain Method for Harmonic Distortion Estimation in CMOS Circuits", IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 40, no. 1, pp. 157-170, Jan. 2021.

D. Baxevanakis, P.P. Sotiriadis, "Accurate Harmonic Distortion Estimation in CMOS Circuits Using a Cross-Product Gm-Stage Modeling", IEEE International Symposium on Circuits and Systems, Seville, Spain, 2020.

P.P. Sotiriadis, A. Celik, D. Loizos, Z. Zhang, “Fast State-Space Harmonic-Distortion Estimation in Weakly Nonlinear Gm-C Filters”, IEEE Trans. on Circuits and Systems—I, Vol. 54, No. 1, Jan. 2007, pp. 218-228.

A. Celik, Z. Zhang, P.P. Sotiriadis, “A State-Space Approach to Intermodulation Distortion Estimation in Fully Balanced Band-Pass Gm-C Filters with Weak Nonlinearities”, IEEE Trans. on Circuits and Systems—I, Vol. 54, No. 4, April 2007, pp. 829-844.

A. Celik, Z. Zhang, P. Sotiriadis, “Rapid Intermodulation Distortion Estimation in Fully Balanced Weakly Nonlinear Gm-C Filters using State-Space Modeling”, Great Lakes Symp. on VLSI, 2006.

Z. Zhang, A. Celik, P. Sotiriadis, “A Fast State-Space Algorithm to Estimate Harmonic Distortion in Fully Differential Weakly Nonlinear Gm- C Filters”, IEEE International Symposium on Circuits and Systems, 2006.

Z. Zhang, A. Celik, P.P. Sotiriadis, “State-Space Harmonic Distortion Modeling in Weakly Nonlinear, Fully Balanced Gm-C Filters - A Modular Approach Resulting in Closed Form Solutions” , IEEE Trans. on Circuits and Systems—I, Vol. 53, No. 1, Jan. 2006, pp. 48-59.