Low Power Integrated Classifier Circuits Based on Gaussian Mixture Model with Digital Inputs and Outputs
Lazaros Strakosi
Abstract
In this diploma thesis, the design of an analog classifier with digital inputs and digital outputs, based on the Gaussian function, will be presented. Specifically, the proposed classifiers' basis is the Gaussian Mixture Model, as well as the simple Bayesian Model. In particular, the implemented circuit is able to produce Gaussian distributions, depending on the values of the voltages and currents that control its parameters. The power consumption is very low, as the supply voltage is 0.5V or 0.6V, relying on the application, and the bias currents are from some pA to some nA. The models are trained using the program language Python. The proposed architectures are validated with the use of three real-world datasets. The implementations and simulations of these architectures is done using the design tool Cadence IC Suite in TSMC 90 nm CMOS process.