Design of an Electronically Controlled Controller of Fractional Order Using Active Components
Georgios Pappas
Abstract
The aim of the presented Diploma Thesis is the implementation of fractional order PID controllers (FO-PID) that drive a process variable which has a predefined transfer function. Circuits such as operational amplifiers (Opamps), operational transconductance amplifiers (OTAs), differential and integral fractional order topologies ,based on analog filters like IFLF (inverse follow-the-leader feedback) method, and fractional order capacitors were analyzed and designed. Initially, the circuit of an operational amplifier was designed in a low power environment ± 750mV which is equivalent to low power consumption. The frequency range we are working on is from 100mHz up to 10Hz, because, according to the literature, these circuits operate in the specific frequency range and are used in control systems applications. What follows is, different topologies for PID controllers were analyzed and designed using passive elements. The first topology was designed with four operational amplifiers. Subsequently, we designed a topology with three operational amplifiers and finally we designed two more realizations. These two topologies are implemented with two and one operational amplifier respectively, which were compared in terms of their performance and the space they occupy in a physical design and we ended up with the predominant one as we will see below. In the design of the whole Chip it is important to deal with the limitations of space and design compact cells. Afterwards, the circuit of an operational transconductance amplifier (OTA) was designed and analyzed and then used as an active and tunable resistor in our PID topologies. At the beginning, we designed fractional order capacitors with passive elements (resistors, capacitors).These fractional order capacitors replaced then with an IFLF topology filter with a voltage to current converter on it’s output. The voltage to current converter designed with a differential input-output OTA. This circuit approximates a tunable fractional order capacitor. In conclusion, the final circuit of the PIλDμ controller contains only active components and it is fully electronically tunable. In addition, the physical design (Layout) of the proposed controller was designed and post-layout simulations confirmed the proper operation of the controller. Each measurement was done through simulations (for each topology) using the Cadence IC software. All the simulations compared to the theoretical results of MATLAB. All circuits were designed and simulated in TSMC-90nm.