Study of the Properties of a Multi-Step Look-Ahead Σ-Δ Converter
Michaela-Astero Misokefalou
Abstract
The purpose of this diploma thesis is the study and analysis of a single-bit Digital to Digital Converter (DD). The input of the system is a digital signal consisting of a large number of bits, while the output of is a sequence of {+1, -1}. The advantage of reducing the number of bit for representing the digital input signal is the linearity that gives the generated output and there is no need for a multi-bit Digital to Analog Converter (DAC). The multi-bit DACs have many default quantization levels and possible defects in the analog part (capacitors, resistors) cause changes in the prices of these levels and introduce nonlinear phenomena burdening the operation of the modulator. In the case of single-bit converter, that has a level of quantization error in the signal representation will be very great and to avoid a high sampling rate is required. The recovery of the original signal is quite simple and can be performed by applying a low pass filter.
For the implementation of the ΣΔ converter, the topology of Multi Step Look Ahead converter is used, which is the research proposal of doctoral Mr. Baseta and responsible supervisor Mr. Sotiriadi. Unlike the conventional ΣΔ converter, the calculation of the output results from the minimization of the cost function of the system, taking into account future inputs. In this study the behavior of an MSLA converter is examined that looks steps ahead. More specifically, the characteristics of the converter are studied and investigated in detail and also made a detailed calculation of the numbers of bits that are used for the signals in order to make the system efficient.